Masanori Ogino omasanori

2025年の趣味開発環境

2025年は趣味開発環境の変化が大きかったので備忘録として残しておく。

前提:

趣味開発はほぼ毎日している
開発するのはコマンドラインツールやライブラリが多い
言語はほぼRust
開発はほぼAndroid上

Hazard3 Closely-coupled Accelerators

This document describes the Hazard3 closely-coupled accelerator interface (CCA) and the associated the Xh3cca RISC-V extension. The purpose of the CCA interface is:

Higher write throughput into core-local accelerators
Support for I/O stalls that do not block debug and IRQs (impossible on AHB)
Access to accelerators without generating addresses first (reduced register pressure)
Access to accelerators without address-dependent protection checks (improved control-path timing)
Atomic (non-tearing) reads of 64-bit buses
Compatibility with vendor coprocessors designed for Cortex-M systems

RISC-V Vector Extension for Integer Workloads: An Informal Gap Analysis

Note: To verify my RVI membership and idenity on this otherwise semi anonymous account: I'm Olaf Bernstein, you should be able to view my sig-vector profile, if you are a member of the vector SIG.

The goal of this document is to explore gaps in the current RISC-V Vector extensions (standard V, Zvbb, Zvbc, Zvkg, Zvkn, Zvks), and suggest instructions to fill these gaps. My focus lies on application class processors, with the expectation that suggested instructions would be suitable to become mandatory or optional instructions in future profiles.

I'll assume you are already familiar with RVV, if not, here is a great introduction and here the latest RISC-V ISA manual.

OSDNのミラーコンテンツ 2023/11/19

OSDNでのリリースファイルやソースコードは全世界の25〜30箇所程の公開ミラーサイトへミラーリングされていた。現時点ではどれだけ生存しているかは調べていないが、まだそれなりに生きているかと思われる。ただ、日本だとJAIST(ftp.jaist.ac.jp)とIIJ(ftp.iij.ad.jp)しかないようである。

IIJ: https://ftp.iij.ad.jp/pub/osdn.jp/
JAIST: https://ftp.jaist.ac.jp/pub/sourceforge.jp/

リリースファイル：

OSDNではファイルの公開方法は二種類存在し、それぞれをファイルリリース、ファイルストレージと呼んでいた。前者は最初期からあるリリースシステムであり、後者はrsync等でも利用できる置き放題のストレージシステムである。

TPM provides zero practical security

TPM (Trusted Platform Module) is as useful for preventing real attackers as the TSA is at preventing real terrorists. The architecture is fundamentally flawed and most existing implementations are completely broken. I thought this argument was settled decades ago[1] when "trusted computing" was introduced mostly as a way to provide DRM and ownership capabilities to organizations. It has largely failed to impact the consumer market when it was introduced back in the early 2000s. However, recently there seems to be a movement by certain parties to reintroduce this failed product back to the market. Microsoft argues that in order to use Windows 11, you need TPM 2.0 compatible hardware because[2]:

The Trusted Platform Module(TPM) requirement ena

Xilinx ISE 14.7 on Windows 10

A short guide to installing and using Xilinx ISE 14.7 on Windows 10

Prerequisites

Download Xilinx ISE 14.7 (non-"Windows 10" package)
- https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/vivado-design-tools/archive-ise.html#collapse-14-7
- Scroll down to "14.7 Full Product Installation"
- Select "Full Installer for Windows 7/XP/Server (TAR/GZIP - 6.18 GB)"

Requires Xilinx account login and export approval in order to download

https://review.coreboot.org/c/coreboot/+/46943 cpu/intel/Makefile.inc: Use correct Kconfig symbols https://review.coreboot.org/c/coreboot/+/46977 sb/intel/lynxpoint: Use common code to generate HPET table https://review.coreboot.org/c/coreboot/+/46719 sb/intel/lynxpoint: Drop unnecessary 'UL' suffix https://review.coreboot.org/c/coreboot/+/46720 {cpu,nb}/intel/haswell: Drop unnecessary 'UL' suffix https://review.coreboot.org/c/coreboot/+/46725 sb/intel/lynxpoint/lpc.c: Simplify PM init sequence https://review.coreboot.org/c/coreboot/+/46726 sb/intel/lynxpoint: Align with Broadwell https://review.coreboot.org/c/coreboot/+/46727 azalia: Treat all negative return values as errors https://review.coreboot.org/c/coreboot/+/46728 azalia: Use 'HDA_GCTL_CRST' macro as unset-mask https://review.coreboot.org/c/coreboot/+/46734 Revert "broadwell: Switch to using common ACPI _SWS code" https://review.coreboot.org/c/coreboot/+/46732 soc/intel/broadwell/gma.c: Align struct with Haswell

	# Modified by Tadashi Saito (@tadd), 2022
	# https://gist.github.com/tadd/72fd6cd1efa41ea5b4e38a1cce9c7ad5
	#
	# ipsj.cls を upLaTeX 用にしてみる（源ノ明朝・源ノ角ゴシックを使う）
	# https://gist.github.com/trueroad/c44312923bf02226c2274388941d0453
	#
	# ipsj.cls は pLaTeX 専用のようなのですが、
	# 試しに upLaTeX で使えるようにした up-ipsj.cls を作ってみました。
	# upLaTeX なので pLaTeX では難しかった源ノ明朝・源ノ角ゴシックの利用が
	# できるようになります。

	OpenBSD 7.3-current (GENERIC.MP) #1: Tue Jun 27 09:53:32 CEST 2023
	reyk@kyushu.local.atexit.net:/usr/src/sys/arch/amd64/compile/GENERIC.MP
	real mem = 33916760064 (32345MB)
	avail mem = 32869203968 (31346MB)
	random: good seed from bootblocks
	mpath0 at root
	scsibus0 at mpath0: 256 targets
	mainbus0 at root
	bios0 at mainbus0: SMBIOS rev. 3.4 @ 0x55a9e000 (82 entries)
	bios0: vendor LENOVO version "N3XET38W (1.13 )" date 04/26/2023

	wpa_supplicant -B -i interface -c <(wpa_passphrase 'SSID' 'key').

	ping 1.1.1.1

	parted /dev/nvme0n1 -- mklabel gpt
	parted /dev/nvme0n1 -- mkpart primary 512MiB -0
	parted /dev/nvme0n1 -- mkpart ESP fat32 1MiB 512MiB
	parted /dev/nvme0n1 -- set 2 esp on

	cryptsetup luksFormat /dev/nvme0n1p1