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19h/extract_v850_reloc_masks.py

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v850 relo mask
Raw
extract_v850_reloc_masks.py
cat module/nec850/tools/extract_v850_reloc_masks.py
#!/usr/bin/env python3
"""
Extract V850/RH850 relocation masks from binutils sources and compare them
against the mask classes implemented in module/nec850/ana.cpp.
The extraction prefers the relocation write logic in
`bfd/elf32-v850.c:v850_elf_perform_relocation()` and only falls back to
HOWTO table masks when a relocation is not explicitly handled there.
"""
from __future__ import annotations
import argparse
import re
import sys
from dataclasses import dataclass
from pathlib import Path
from typing import Dict, Iterable, List, Optional, Sequence, Tuple
@dataclass(frozen=True)
class reloc_mask_t:
name: str
value: Optional[int]
width_bits: int
mask: int
source: str
RELOC_DEF_RE = re.compile(
r"RELOC_NUMBER\s*\(\s*(R_[A-Za-z0-9_]+)\s*,\s*(0x[0-9A-Fa-f]+|\d+)\s*\)"
)
CASE_RE = re.compile(r"^\s*case\s+(R_[A-Za-z0-9_]+)\s*:\s*$")
DEFAULT_RE = re.compile(r"^\s*default\s*:")
def parse_int(text: str) -> int:
return int(text, 0)
def hex_width(value: int, width_bits: int) -> str:
width_nibbles = max(1, width_bits // 4)
return f"0x{value:0{width_nibbles}x}"
def mask_to_le_bytes(mask: int, width_bits: int) -> Tuple[int, ...]:
width_bytes = width_bits // 8
return tuple((mask >> (8 * i)) & 0xFF for i in range(width_bytes))
def canonicalize_bytes(mask_bytes: Sequence[int]) -> Tuple[int, ...]:
if not mask_bytes:
return tuple()
lo = 0
hi = len(mask_bytes)
while lo < hi and mask_bytes[lo] == 0:
lo += 1
while hi > lo and mask_bytes[hi - 1] == 0:
hi -= 1
return tuple(mask_bytes[lo:hi])
def read_text(path: Path) -> str:
return path.read_text(encoding="utf-8", errors="replace")
def parse_reloc_numbers(v850_h_path: Path) -> Dict[str, int]:
text = read_text(v850_h_path)
out: Dict[str, int] = {}
for m in RELOC_DEF_RE.finditer(text):
out[m.group(1)] = parse_int(m.group(2))
return out
def extract_braced_block(text: str, start_index: int) -> Tuple[str, int, int]:
i = text.find("{", start_index)
if i < 0:
raise RuntimeError("Cannot find opening brace")
depth = 0
j = i
while j < len(text):
c = text[j]
if c == "{":
depth += 1
elif c == "}":
depth -= 1
if depth == 0:
return text[i + 1 : j], i, j
j += 1
raise RuntimeError("Unbalanced braces")
def eval_const_expr(expr: str) -> Optional[int]:
cleaned = expr.strip()
if not cleaned:
return None
cleaned = cleaned.replace("(bfd_vma)", "")
cleaned = cleaned.replace("(unsigned long)", "")
cleaned = cleaned.replace("(long)", "")
cleaned = re.sub(r"\b(0x[0-9A-Fa-f]+|\d+)([uUlL]+)\b", r"\1", cleaned)
if re.search(r"\b[a-zA-Z_][a-zA-Z0-9_]*\b", cleaned):
return None
if not re.fullmatch(r"[0-9xXa-fA-F()\s|&~+\-<>]+", cleaned):
return None
try:
value = eval(cleaned, {"__builtins__": None}, {})
except Exception:
return None
if not isinstance(value, int):
return None
return value
def infer_width_bits(case_body: str) -> Optional[int]:
has_32 = re.search(r"\bbfd_get_32\b|\bbfd_put_32\b", case_body) is not None
has_16 = re.search(r"\bbfd_get_16\b|\bbfd_put_16\b", case_body) is not None
has_8 = re.search(r"\bbfd_get_8\b|\bbfd_put_8\b", case_body) is not None
if has_32:
return 32
if has_16:
return 16
if has_8:
return 8
return None
def infer_mask_from_case_body(
case_body: str, width_bits: Optional[int]
) -> Optional[int]:
# 1) Explicit clear pattern: insn &= ~EXPR;
for m in re.finditer(r"insn\s*&=\s*~\s*([^;]+);", case_body):
v = eval_const_expr(m.group(1))
if v is not None:
return v
# 2) Preserve pattern embedded in assignment: (insn & ~EXPR)
for m in re.finditer(r"insn\s*&\s*~\s*([^\)\|;]+)", case_body):
v = eval_const_expr(m.group(1))
if v is not None:
return v
# 3) Preserve pattern in assignment: (insn & MASK) -> relocated bits are ~MASK
if width_bits is not None:
full = (1 << width_bits) - 1
for m in re.finditer(
r"insn\s*=\s*[^;]*\(\s*insn\s*&\s*(0x[0-9A-Fa-f]+|\d+)\s*\)", case_body
):
keep = parse_int(m.group(1))
return full & ~keep
# 4) In-place preserve pattern: insn &= MASK;
for m in re.finditer(r"insn\s*&=\s*(0x[0-9A-Fa-f]+|\d+)\s*;", case_body):
keep = parse_int(m.group(1))
return full & ~keep
# 5) Full-width write paths
if width_bits == 32 and re.search(
r"\bbfd_put_32\s*\(\s*abfd\s*,\s*addend\b", case_body
):
return 0xFFFFFFFF
if width_bits == 8 and re.search(
r"\bbfd_put_8\s*\(\s*abfd\s*,\s*addend\b", case_body
):
return 0xFF
if width_bits is not None and re.search(r"\binsn\s*=\s*addend\s*;", case_body):
return (1 << width_bits) - 1
if width_bits == 16 and "v850_elf_perform_lo16_relocation" in case_body:
return 0xFFFF
return None
def extract_perform_relocation_masks(
elf32_v850_path: Path,
) -> Dict[str, Tuple[int, int]]:
text = read_text(elf32_v850_path)
fn_match = re.search(r"\bv850_elf_perform_relocation\s*\(", text)
if fn_match is None:
raise RuntimeError("Cannot locate v850_elf_perform_relocation()")
fn_body, _, _ = extract_braced_block(text, fn_match.start())
sw_match = re.search(r"\bswitch\s*\(\s*r_type\s*\)", fn_body)
if sw_match is None:
raise RuntimeError("Cannot locate switch (r_type) in perform_relocation")
sw_body, _, _ = extract_braced_block(fn_body, sw_match.start())
out: Dict[str, Tuple[int, int]] = {}
pending_cases: List[str] = []
pending_body: List[str] = []
def flush_group() -> None:
nonlocal pending_cases, pending_body
if not pending_cases:
return
body = "\n".join(pending_body)
width_bits = infer_width_bits(body)
mask = infer_mask_from_case_body(body, width_bits)
if width_bits is not None and mask is not None:
mask &= (1 << width_bits) - 1
for case_name in pending_cases:
out[case_name] = (width_bits, mask)
pending_cases = []
pending_body = []
for line in sw_body.splitlines():
m_case = CASE_RE.match(line)
if m_case:
if pending_cases and pending_body:
flush_group()
pending_cases.append(m_case.group(1))
continue
if DEFAULT_RE.match(line):
flush_group()
continue
if pending_cases:
pending_body.append(line)
flush_group()
return out
def split_top_level_args(text: str) -> List[str]:
args: List[str] = []
current: List[str] = []
depth = 0
for c in text:
if c == "," and depth == 0:
args.append("".join(current).strip())
current = []
continue
if c == "(":
depth += 1
elif c == ")":
depth -= 1
current.append(c)
if current:
args.append("".join(current).strip())
return args
def extract_howto_fallback_masks(elf32_v850_path: Path) -> Dict[str, Tuple[int, int]]:
text = read_text(elf32_v850_path)
tbl_start = text.find("static reloc_howto_type v850_elf_howto_table[]")
if tbl_start < 0:
return {}
tbl_body, _, _ = extract_braced_block(text, tbl_start)
out: Dict[str, Tuple[int, int]] = {}
i = 0
while i < len(tbl_body):
h = tbl_body.find("HOWTO", i)
if h < 0:
break
p = tbl_body.find("(", h)
if p < 0:
break
depth = 0
j = p
while j < len(tbl_body):
c = tbl_body[j]
if c == "(":
depth += 1
elif c == ")":
depth -= 1
if depth == 0:
break
j += 1
if j >= len(tbl_body):
break
raw_args = tbl_body[p + 1 : j]
args = split_top_level_args(raw_args)
i = j + 1
if len(args) < 12:
continue
reloc_name = args[0].strip()
if not reloc_name.startswith("R_"):
continue
size_arg = args[2].strip()
dst_mask_arg = args[11].strip()
size_bytes_val = eval_const_expr(size_arg)
if size_bytes_val is None:
continue
width_bits = int(size_bytes_val) * 8
if width_bits <= 0:
continue
mask_val = eval_const_expr(dst_mask_arg)
if mask_val is None:
continue
mask_val &= (1 << width_bits) - 1
out[reloc_name] = (width_bits, mask_val)
return out
def build_ana_patterns() -> Dict[str, Tuple[int, ...]]:
# Encoded as (instruction-size-bytes, [(byte_index, byte_mask), ...]).
# These come directly from mark_calcrel_bits() and helper functions in ana.cpp.
ana_classes = {
"disp22": (4, [(0, 0x3F), (2, 0xFE), (3, 0xFF)]),
"disp32": (6, [(2, 0xFE), (3, 0xFF), (4, 0xFF), (5, 0xFF)]),
"disp16": (4, [(2, 0xFF), (3, 0xFF)]),
"disp15": (4, [(2, 0xFE), (3, 0xFF)]),
"disp16_split": (4, [(0, 0x20), (2, 0xFE), (3, 0xFF)]),
"disp23_byte": (6, [(2, 0xF0), (3, 0x07), (4, 0xFF), (5, 0xFF)]),
"disp23_aligned": (6, [(2, 0xE0), (3, 0x07), (4, 0xFF), (5, 0xFF)]),
"bcond17": (4, [(0, 0x10), (2, 0xFE), (3, 0xFF)]),
"bcond9": (2, [(0, 0x70), (1, 0xF8)]),
"tail_disp16": (6, [(4, 0xFF), (5, 0xFF)]),
"tda_7bit": (2, [(0, 0x7F)]),
"tda_6bit_s1": (2, [(0, 0x7E)]),
"tda_4bit": (2, [(0, 0x0F)]),
"imm32_full": (6, [(2, 0xFF), (3, 0xFF), (4, 0xFF), (5, 0xFF)]),
"callt_6_7": (2, [(0, 0x3F)]),
}
out: Dict[str, Tuple[int, ...]] = {}
for name, (size, pairs) in ana_classes.items():
bytes_mask = [0] * size
for idx, m in pairs:
if 0 <= idx < size:
bytes_mask[idx] |= m
out[name] = canonicalize_bytes(bytes_mask)
return out
def should_skip_coverage(name: str, width_bits: int, mask: int) -> bool:
if width_bits == 8:
# Byte-sized relocations are generally data relocs and are not modeled by
# ana.cpp instruction-mask helpers.
return True
if width_bits == 0 or mask == 0:
return True
skip_substrings = (
"NONE",
"GNU_",
"LONGCALL",
"LONGJUMP",
"ALIGN",
"COPY",
"GLOB_DAT",
"JMP_SLOT",
"RELATIVE",
"CODE",
"DATA",
)
return any(s in name for s in skip_substrings)
def format_bytes(bs: Iterable[int]) -> str:
return " ".join(f"{b:02x}" for b in bs)
def main() -> int:
parser = argparse.ArgumentParser(
description=(
"Extract V850 relocation masks from binutils and compare against "
"nec850 calcrel mask classes."
)
)
parser.add_argument(
"--binutils-root",
default="/Users/int/hexrays/binutils-2.43",
help="Path to binutils source root",
)
parser.add_argument(
"--show-all",
action="store_true",
help="Show all extracted relocations, including coverage-skipped ones",
)
args = parser.parse_args()
binutils_root = Path(args.binutils_root)
v850_h_path = binutils_root / "include" / "elf" / "v850.h"
elf32_v850_path = binutils_root / "bfd" / "elf32-v850.c"
if not v850_h_path.exists():
print(f"ERROR: missing file: {v850_h_path}", file=sys.stderr)
return 1
if not elf32_v850_path.exists():
print(f"ERROR: missing file: {elf32_v850_path}", file=sys.stderr)
return 1
reloc_numbers = parse_reloc_numbers(v850_h_path)
perform_masks = extract_perform_relocation_masks(elf32_v850_path)
# Some cases need semantic overrides where a naive bit-clear parse would
# otherwise over-approximate the real relocated bits.
perform_masks.update(
{
"R_V850_CALLT_6_7_OFFSET": (16, 0x003F),
}
)
howto_masks = extract_howto_fallback_masks(elf32_v850_path)
merged: Dict[str, reloc_mask_t] = {}
for name, (width_bits, mask) in howto_masks.items():
merged[name] = reloc_mask_t(
name=name,
value=reloc_numbers.get(name),
width_bits=width_bits,
mask=mask,
source="howto",
)
for name, (width_bits, mask) in perform_masks.items():
merged[name] = reloc_mask_t(
name=name,
value=reloc_numbers.get(name),
width_bits=width_bits,
mask=mask,
source="perform_relocation",
)
items = list(merged.values())
items.sort(
key=lambda x: (
0 if x.value is not None else 1,
x.value if x.value is not None else 0xFFFFFFFF,
x.name,
)
)
print("Extracted relocation masks")
print("=" * 120)
print(
f"{'Value':>7} {'Name':<33} {'Bits':>4} {'Mask':>12} {'LE Bytes':<18} {'Source'}"
)
print("-" * 120)
for r in items:
if not args.show_all and should_skip_coverage(r.name, r.width_bits, r.mask):
continue
value_text = "-" if r.value is None else f"{r.value:#05x}"
le = mask_to_le_bytes(r.mask, r.width_bits)
print(
f"{value_text:>7} "
f"{r.name:<33} "
f"{r.width_bits:>4} "
f"{hex_width(r.mask, r.width_bits):>12} "
f"[{format_bytes(le):<16}] "
f"{r.source}"
)
ana_patterns = build_ana_patterns()
pattern_to_ana_classes: Dict[Tuple[int, ...], List[str]] = {}
for class_name, pat in ana_patterns.items():
pattern_to_ana_classes.setdefault(pat, []).append(class_name)
print()
print("ANA mask classes (canonical LE bytes)")
print("=" * 120)
for class_name in sorted(ana_patterns):
pat = ana_patterns[class_name]
print(f"{class_name:<20} [{format_bytes(pat)}]")
covered = 0
uncovered: List[reloc_mask_t] = []
print()
print("Coverage against ana.cpp classes")
print("=" * 120)
print(f"{'Name':<33} {'Mask bytes':<18} {'Status':<10} {'Matched class(es)'}")
print("-" * 120)
for r in items:
if should_skip_coverage(r.name, r.width_bits, r.mask):
continue
pat = canonicalize_bytes(mask_to_le_bytes(r.mask, r.width_bits))
matched = pattern_to_ana_classes.get(pat, [])
if matched:
covered += 1
status = "COVERED"
matched_text = ", ".join(sorted(matched))
else:
status = "MISSING"
matched_text = ""
uncovered.append(r)
print(f"{r.name:<33} [{format_bytes(pat):<16}] {status:<10} {matched_text}")
total = covered + len(uncovered)
print("-" * 120)
print(f"Coverage summary: {covered}/{total} covered")
if uncovered:
print()
print("Uncovered relocation masks")
print("=" * 120)
for r in uncovered:
pat = canonicalize_bytes(mask_to_le_bytes(r.mask, r.width_bits))
value_text = "-" if r.value is None else f"{r.value:#05x}"
print(
f"{value_text:>7} {r.name:<33} "
f"mask={hex_width(r.mask, r.width_bits)} bytes=[{format_bytes(pat)}] source={r.source}"
)
return 0
if __name__ == "__main__":
raise SystemExit(main())
Raw
relomask.txt
Extracted relocation masks
========================================================================================================================
Value Name Bits Mask LE Bytes Source
------------------------------------------------------------------------------------------------------------------------
0x001 R_V850_9_PCREL 16 0xf870 [70 f8 ] perform_relocation
0x002 R_V850_22_PCREL 32 0xfffe003f [3f 00 fe ff ] perform_relocation
0x003 R_V850_HI16_S 16 0xffff [ff ff ] perform_relocation
0x004 R_V850_HI16 16 0xffff [ff ff ] perform_relocation
0x005 R_V850_LO16 16 0xffff [ff ff ] perform_relocation
0x006 R_V850_ABS32 32 0xffffffff [ff ff ff ff ] perform_relocation
0x007 R_V850_16 16 0xffff [ff ff ] perform_relocation
0x009 R_V850_SDA_16_16_OFFSET 16 0xffff [ff ff ] perform_relocation
0x00a R_V850_SDA_15_16_OFFSET 16 0xfffe [fe ff ] perform_relocation
0x00b R_V850_ZDA_16_16_OFFSET 16 0xffff [ff ff ] perform_relocation
0x00c R_V850_ZDA_15_16_OFFSET 16 0xfffe [fe ff ] perform_relocation
0x00d R_V850_TDA_6_8_OFFSET 16 0x007e [7e 00 ] perform_relocation
0x00e R_V850_TDA_7_8_OFFSET 16 0x007f [7f 00 ] perform_relocation
0x00f R_V850_TDA_7_7_OFFSET 16 0x007f [7f 00 ] perform_relocation
0x010 R_V850_TDA_16_16_OFFSET 16 0xffff [ff ff ] perform_relocation
0x011 R_V850_TDA_4_5_OFFSET 16 0x000f [0f 00 ] perform_relocation
0x012 R_V850_TDA_4_4_OFFSET 16 0x000f [0f 00 ] perform_relocation
0x013 R_V850_SDA_16_16_SPLIT_OFFSET 32 0xfffe0020 [20 00 fe ff ] perform_relocation
0x014 R_V850_ZDA_16_16_SPLIT_OFFSET 32 0xfffe0020 [20 00 fe ff ] perform_relocation
0x015 R_V850_CALLT_6_7_OFFSET 16 0x003f [3f 00 ] perform_relocation
0x016 R_V850_CALLT_16_16_OFFSET 16 0xffff [ff ff ] perform_relocation
0x01c R_V850_REL32 32 0xffffffff [ff ff ff ff ] perform_relocation
0x01d R_V850_LO16_SPLIT_OFFSET 32 0xfffe0020 [20 00 fe ff ] perform_relocation
0x01e R_V850_16_PCREL 16 0xfffe [fe ff ] perform_relocation
0x01f R_V850_17_PCREL 32 0xfffe0010 [10 00 fe ff ] perform_relocation
0x020 R_V850_23 32 0xffff07f0 [f0 07 ff ff ] perform_relocation
0x023 R_V850_16_SPLIT_OFFSET 32 0xfffe0020 [20 00 fe ff ] perform_relocation
0x024 R_V850_16_S1 16 0xfffe [fe ff ] perform_relocation
0x025 R_V850_LO16_S1 16 0xfffe [fe ff ] perform_relocation
0x026 R_V850_CALLT_15_16_OFFSET 16 0xfffe [fe ff ] perform_relocation
0x032 R_V810_HWORD 16 0xffff [ff ff ] perform_relocation
0x033 R_V810_WORD 32 0xffffffff [ff ff ff ff ] perform_relocation
0x034 R_V810_WLO 16 0xffff [ff ff ] perform_relocation
0x035 R_V810_WHI 16 0xffff [ff ff ] perform_relocation
0x036 R_V810_WHI1 16 0xffff [ff ff ] perform_relocation
0x03d R_V850_HWLO 16 0xfffe [fe ff ] perform_relocation
0x046 R_V850_PCR22 32 0xfffe003f [3f 00 fe ff ] perform_relocation
0x047 R_V850_BLO 32 0xfffe0020 [20 00 fe ff ] perform_relocation
0x04c R_V810_WLO_1 16 0xfffe [fe ff ] perform_relocation
0x04d R_V810_GPWLO_1 16 0xfffe [fe ff ] perform_relocation
0x04f R_V850_HWLO_1 16 0xfffe [fe ff ] perform_relocation
0x058 R_V850_PC32 32 0xffffffff [ff ff ff ff ] perform_relocation
0x05f R_V850_PC16U 16 0xfffe [fe ff ] perform_relocation
0x060 R_V850_PC17 32 0xfffe0010 [10 00 fe ff ] perform_relocation
0x064 R_V850_PC9 16 0xf870 [70 f8 ] perform_relocation
0x071 R_V850_WLO23 32 0xffff07f0 [f0 07 ff ff ] perform_relocation
ANA mask classes (canonical LE bytes)
========================================================================================================================
bcond17 [10 00 fe ff]
bcond9 [70 f8]
callt_6_7 [3f]
disp15 [fe ff]
disp16 [ff ff]
disp16_split [20 00 fe ff]
disp22 [3f 00 fe ff]
disp23_aligned [e0 07 ff ff]
disp23_byte [f0 07 ff ff]
disp32 [fe ff ff ff]
imm32_full [ff ff ff ff]
tail_disp16 [ff ff]
tda_4bit [0f]
tda_6bit_s1 [7e]
tda_7bit [7f]
Coverage against ana.cpp classes
========================================================================================================================
Name Mask bytes Status Matched class(es)
------------------------------------------------------------------------------------------------------------------------
R_V850_9_PCREL [70 f8 ] COVERED bcond9
R_V850_22_PCREL [3f 00 fe ff ] COVERED disp22
R_V850_HI16_S [ff ff ] COVERED disp16, tail_disp16
R_V850_HI16 [ff ff ] COVERED disp16, tail_disp16
R_V850_LO16 [ff ff ] COVERED disp16, tail_disp16
R_V850_ABS32 [ff ff ff ff ] COVERED imm32_full
R_V850_16 [ff ff ] COVERED disp16, tail_disp16
R_V850_SDA_16_16_OFFSET [ff ff ] COVERED disp16, tail_disp16
R_V850_SDA_15_16_OFFSET [fe ff ] COVERED disp15
R_V850_ZDA_16_16_OFFSET [ff ff ] COVERED disp16, tail_disp16
R_V850_ZDA_15_16_OFFSET [fe ff ] COVERED disp15
R_V850_TDA_6_8_OFFSET [7e ] COVERED tda_6bit_s1
R_V850_TDA_7_8_OFFSET [7f ] COVERED tda_7bit
R_V850_TDA_7_7_OFFSET [7f ] COVERED tda_7bit
R_V850_TDA_16_16_OFFSET [ff ff ] COVERED disp16, tail_disp16
R_V850_TDA_4_5_OFFSET [0f ] COVERED tda_4bit
R_V850_TDA_4_4_OFFSET [0f ] COVERED tda_4bit
R_V850_SDA_16_16_SPLIT_OFFSET [20 00 fe ff ] COVERED disp16_split
R_V850_ZDA_16_16_SPLIT_OFFSET [20 00 fe ff ] COVERED disp16_split
R_V850_CALLT_6_7_OFFSET [3f ] COVERED callt_6_7
R_V850_CALLT_16_16_OFFSET [ff ff ] COVERED disp16, tail_disp16
R_V850_REL32 [ff ff ff ff ] COVERED imm32_full
R_V850_LO16_SPLIT_OFFSET [20 00 fe ff ] COVERED disp16_split
R_V850_16_PCREL [fe ff ] COVERED disp15
R_V850_17_PCREL [10 00 fe ff ] COVERED bcond17
R_V850_23 [f0 07 ff ff ] COVERED disp23_byte
R_V850_16_SPLIT_OFFSET [20 00 fe ff ] COVERED disp16_split
R_V850_16_S1 [fe ff ] COVERED disp15
R_V850_LO16_S1 [fe ff ] COVERED disp15
R_V850_CALLT_15_16_OFFSET [fe ff ] COVERED disp15
R_V810_HWORD [ff ff ] COVERED disp16, tail_disp16
R_V810_WORD [ff ff ff ff ] COVERED imm32_full
R_V810_WLO [ff ff ] COVERED disp16, tail_disp16
R_V810_WHI [ff ff ] COVERED disp16, tail_disp16
R_V810_WHI1 [ff ff ] COVERED disp16, tail_disp16
R_V850_HWLO [fe ff ] COVERED disp15
R_V850_PCR22 [3f 00 fe ff ] COVERED disp22
R_V850_BLO [20 00 fe ff ] COVERED disp16_split
R_V810_WLO_1 [fe ff ] COVERED disp15
R_V810_GPWLO_1 [fe ff ] COVERED disp15
R_V850_HWLO_1 [fe ff ] COVERED disp15
R_V850_PC32 [ff ff ff ff ] COVERED imm32_full
R_V850_PC16U [fe ff ] COVERED disp15
R_V850_PC17 [10 00 fe ff ] COVERED bcond17
R_V850_PC9 [70 f8 ] COVERED bcond9
R_V850_WLO23 [f0 07 ff ff ] COVERED disp23_byte
------------------------------------------------------------------------------------------------------------------------
Coverage summary: 46/46 covered
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